R5F100GEAFB#10
Mawonekedwe
Ukadaulo wogwiritsa ntchito mphamvu kwambiri
VDD = mphamvu imodzi yokha yamagetsi ya 1.6 mpaka 5.5 V
HALT mode
IMANI mode
SNOOZE mode
RL78 CPU core
Zomangamanga za CISC zokhala ndi mapaipi a magawo atatu
Nthawi yocheperako yoperekera malangizo: Itha kusinthidwa
kuchokera pa liwiro lalikulu (0.03125 μs: @ 32 MHz ntchito
ndi high-speed on-chip oscillator) mpaka kuthamanga kwambiri
(30.5 μs: @ 32.768 kHz ntchito ndi subsystem
koloko)
Malo adilesi: 1 MB
Kaundula wa zolinga zonse: (8-bit kaundula × 8) × 4
mabanki
Pa-chip RAM: 2 mpaka 32 KB
Code flash memory
Code flash memory: 16 mpaka 512 KB
Kukula kwa block: 1 KB
Kuletsa kufufuta kwa block ndikulembanso (chitetezo
ntchito)
Pa-chip debug ntchito
Kudzipanga nokha (ndi boot swap function/flash shield
ntchito ya chiwindi)
Data Flash Memory
Memory flash ya data: 4 KB mpaka 8 KB
Background operation (BGO): Malangizo angakhale
kuchitidwa kuchokera ku pulogalamu yokumbukira pamene mukulembanso fayilo ya
data flash memory.
Chiwerengero chaolembedwanso: nthawi 1,000,000 (TYP.)
Mphamvu yolembanso: VDD = 1.8 mpaka 5.5 V
High-liwiro pa-chip oscillator
Sankhani kuchokera ku 32 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz,
6 MHz, 4 MHz, 3 MHz, 2 MHz, ndi 1 MHz
Kulondola kwakukulu: +/- 1.0 % (VDD = 1.8 mpaka 5.5 V, TA = -20
mpaka +85°C)
Kugwira ntchito yozungulira kutentha
TA = -40 mpaka +85°C (A: Ntchito za ogula, D:
Mapulogalamu a mafakitale)
TA = -40 mpaka +105°C (G: Mapulogalamu a mafakitale)
Kuwongolera mphamvu ndi kukonzanso ntchito
Pa-chip mphamvu-on-reset (POR) dera
On-chip voltage detector (LVD) (Sankhani kusokoneza ndi
bwererani ku milingo 14)
Wolamulira wa DMA (Direct Memory Access) · 2/4 njira · Chiwerengero cha mawotchi pakusintha pakati pa 8/16-bit SFR ndi RAM yamkati: 2 mawotchi ochulukitsa ndi ogawa / ochulukitsa-ochulukitsa · 16 bits × 16 bits = 32 bits (Osasainidwa kapena adasainidwa) · 32 bits ÷ 32 bits = 32 bits (Osasainidwa) · 16 bits × 16 bits + 32 bits = 32 bits (Osasainidwa kapena osainidwa) mawonekedwe a seri · CSI: 2 mpaka 8 njira · UART/UART (LIN-bus yothandizidwa) : 2 mpaka 4 njira · Kulankhulana kwa I2C/Yosavuta I2C: 3 mpaka 10 njira Timer · 16-bit timer: 8 mpaka 16 njira · 12-bit interval timer: 1 channel · Wotchi yeniyeni: 1 channel (kalendala ya zaka 99, ntchito ya alamu, ndi ntchito yokonza wotchi) · Watchdog timer: 1 njira (yogwira ntchito ndi oscillator otsika kwambiri pa-chip oscillator) A/D converter · 8/10-bit resolution A/D converter (VDD = 1.6 mpaka 5.5 V) Kulowetsa kwa analogi: 6 mpaka 26 njira · Voltage ya mkati (1.45 V) ndi sensor sensor ya kutentha Dziwani 1 doko la I/O · I/O doko: 16 mpaka 120 (N-ch open drain I/O [kupirira voteji ya 6 V]: 0 mpaka 4, N-ch open drain I/O [VDD kupirira voltage Note 2/EVDD kupirira voltage Note 3]: 5 mpaka 25) · Itha kukhazikitsidwa ku N-ch open drain, TTL input buffer, and on-chip pull-up resistor · Mawonekedwe osiyanasiyana otheka : Ikhoza kulumikiza ku chipangizo cha 1.8/2.5/3 V · On-chip key interrupt function · On-chip clock output/buzzer output controller Ena · On-chip BCD (binary-coded decimal) correction circuit Notes 1. Ikhoza kusankhidwa kokha mu HS (high-speed main) mode 2. Zogulitsa zokhala ndi mapini 20 mpaka 52 3. Zogulitsa za 64 mpaka 128
